Company WIPRO
Website http://www.wipro.com/
Desirable Skills
Digital FPGA design concepts
Job Description
FPGA, RTL, design, vhdl. verilog, synthesis , FPGA, RTL, design, vhdl. verilog, synthesis , FPGA, RTL, design, vhdl. verilog, synthesis , clock tree , FPGA, RTL, design, vhdl. verilog, synthesis , FPGA, RTL, design, vhdl. verilog, synthesis , FPGA, RTL, design, vhdl. verilog, synthesis , clock tree
Roles & Responsibilities
Should be able to lead and manage project execution modules bringing in technical, functional, process or other core ERP product created expertise. Should be able to lead small cross functional teams to ensure delivery and effectively coordinate between onsite an offshore.
Website http://www.wipro.com/
Job description
Mandatory Skills
RTL coding
RTL coding
Desirable Skills
Digital FPGA design concepts
Job Description
FPGA, RTL, design, vhdl. verilog, synthesis , FPGA, RTL, design, vhdl. verilog, synthesis , FPGA, RTL, design, vhdl. verilog, synthesis , clock tree , FPGA, RTL, design, vhdl. verilog, synthesis , FPGA, RTL, design, vhdl. verilog, synthesis , FPGA, RTL, design, vhdl. verilog, synthesis , clock tree
Roles & Responsibilities
Should be able to lead and manage project execution modules bringing in technical, functional, process or other core ERP product created expertise. Should be able to lead small cross functional teams to ensure delivery and effectively coordinate between onsite an offshore.
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